PCB Trace Impedance Calculator (Microstrip/Stripline)
Compute a PCB trace's characteristic impedance (Z₀), effective dielectric and propagation delay for microstrip or stripline.
Uses the IPC-2141 closed-form approximation (best for 0.1 < w/h < 2). For controlled-impedance boards, confirm against your fab's stackup and a field solver.
Disclaimer: This calculator is provided for general informational and educational purposes only, on an “as is” basis and without any warranty of accuracy or fitness for a particular purpose. Results may contain errors — always verify independently before relying on them in real designs. PartAndStock accepts no liability for any loss or damage arising from use of this tool, including when embedded on third-party sites.
How to use
- 1Pick the geometry: microstrip (outer layer, one plane) or stripline (inner layer, between two planes).
- 2Enter the dielectric constant (~4.3 for FR-4), trace width w, copper thickness t and height/separation h in mm.
- 3The characteristic impedance Z₀, effective dielectric and propagation delay are computed instantly.
How it works
Enter trace width, copper thickness, dielectric height and εr to find the characteristic impedance (e.g. 50 Ω) of a microstrip or stripline trace using the IPC-2141 approximation.
What sets trace impedance
A PCB trace and its reference ground plane(s) form a transmission line whose characteristic impedance Z₀ is set by geometry. Making the trace wider or moving it closer to the plane (smaller h) lowers the impedance; a narrower trace or thicker dielectric raises it. A higher dielectric constant εr (~4.3 in FR-4) lowers impedance. A microstrip trace sits on an outer layer above one plane, while a stripline trace is buried between two planes.
Why controlled impedance matters
Fast signals such as USB, HDMI, Ethernet, DDR and RF need a specific line impedance (typically 50 Ω single-ended, 90–100 Ω differential). An impedance mismatch causes reflections, signal degradation and EMI. This tool uses the IPC-2141 closed-form approximation, ideal for quick design and verification. Before manufacturing, get the board's real stackup (layer thicknesses, εr, copper weight) from your fab and confirm with a field solver.
Worked examples
- Microstrip: εr=4.3, w=0.3 mm, t=0.035 mm, h=0.2 mm → Z₀ ≈ 53 Ω
- For 50 Ω: on the same stackup, widen the trace slightly (w↑) → Z₀ drops
- Stripline gives lower Z₀ than microstrip for the same geometry (more capacitance between two planes)
Variables Affecting Impedance
| Variable | As it increases, Z₀ |
|---|---|
| Trace width w | Decreases |
| Height to plane h | Increases |
| Copper thickness t | Slightly decreases |
| Dielectric εr | Decreases |
| Geometry: stripline | Lower than microstrip |