How to Calculate PCB Trace Impedance
PCB trace impedance depends on the trace width (w), dielectric height (h), trace thickness (t) and dielectric constant (εr). The microstrip approximation is Z0 ≈ (87/√(εr+1.41)) × ln(5.98h / (0.8w + t)). Wider traces lower the impedance; a taller dielectric raises it. On FR4, typical targets are 50 Ω (RF) and 90–100 Ω (differential).
PCB trace impedance is the characteristic impedance a trace presents to a high-frequency signal. For high-speed digital (USB, Ethernet) and RF signals, controlling this impedance is essential; otherwise the signal reflects at the end of the trace, distorts and causes data errors. That is why, when designing a PCB, critical traces are routed to a specific impedance (e.g. 50 Ω).
Why is controlled impedance needed?
As the signal frequency rises, a trace no longer behaves like a simple wire but like a transmission line. If the trace's characteristic impedance does not match the source and load, part of the signal reflects back. These reflections cause ringing, loss of signal integrity and EMI. The solution is to keep the trace at a constant impedance end to end — called "controlled impedance".
The microstrip formula
For a trace on an outer layer above a reference plane, the approximate impedance is:
Z0 ≈ (87 / √(εr + 1.41)) × ln( 5.98h / (0.8w + t) )
| Symbol | Meaning | Note |
|---|---|---|
| Z0 | Characteristic impedance | Ohms (Ω) |
| εr | Dielectric constant | FR4 ≈ 4.3 |
| h | Dielectric height (trace ↔ plane) | mm / mils |
| w | Trace width | mm / mils |
| t | Trace (copper) thickness | mm / mils |
Common target impedances
| Application | Target impedance |
|---|---|
| RF / antenna line (single-ended) | 50 Ω |
| USB (differential) | 90 Ω |
| Ethernet / LVDS (differential) | 100 Ω |
What affects the impedance?
- Trace width (w): increasing it lowers impedance.
- Dielectric height (h): increasing it raises impedance.
- Dielectric constant (εr): increasing it lowers impedance.
So when targeting 50 Ω, widening the trace lowers the impedance while moving the reference plane farther raises it.
Worked example
FR4 (εr = 4.3), h = 0.2 mm (≈ 7.87 mils), w = 0.3 mm (≈ 11.8 mils), t = 1 oz (≈ 1.4 mils):
- 87 / √(4.3 + 1.41) = 87 / 2.39 ≈ 36.4
- 5.98 × 7.87 / (0.8 × 11.8 + 1.4) = 47.1 / 10.8 ≈ 4.35 → ln(4.35) ≈ 1.47
- Z0 ≈ 36.4 × 1.47 ≈ 53 Ω (close to the 50 Ω target; widening the trace slightly brings it to exactly 50)
Important caveat
This formula is approximate. A real design must use the manufacturer's layer stackup and a 2D field solver. Also, a trace on an inner layer (stripline) uses a different formula and runs between two reference planes. Always confirm impedance control with your fabricator for critical lines.
Use the calculator
To hit a target impedance from the dielectric constant, height, width and thickness, use our PCB Trace Impedance Calculator.