What Is a CPLD?
A CPLD (Complex Programmable Logic Device) is a programmable logic chip smaller and simpler than an FPGA, but which stores its configuration persistently (inside itself).
How Does It Work?
Inside it there are a limited number of programmable logic blocks, and these build logic functions. The configuration is held in persistent memory inside the chip, so it needs no external memory.
Difference From an FPGA
An FPGA usually loads its configuration from external Flash at every startup and is much larger. A CPLD is small, its configuration is persistent and it powers up instantly (instant-on). It's more practical for simple logic.
| Property | CPLD | FPGA |
|---|---|---|
| Capacity | Small | Large |
| Configuration | Persistent (inside) | Usually external |
| Startup | Instant | Needs loading |
Why Is It Preferred?
Its instant startup and not needing external memory make it ideal for control/glue-logic tasks that must run immediately at power-up. For a few logic functions it's cheaper and simpler than an FPGA.
Where Is It Used?
Glue logic (the "glue" between chips), power sequencing, startup control, address decoding and simple state machines.
Common Mistakes
- Large design: its capacity is limited; complex work needs an FPGA.
- Wrong choice: putting an FPGA on simple logic raises cost/complexity.
- Pin plan: with limited resources the pin/logic balance must be calculated in advance.
Frequently Asked Questions
CPLD or FPGA?+
Why is a CPLD fast at startup?+
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